Commit 0ff8e21c authored by Martin Pépin's avatar Martin Pépin
Browse files

Merge branch 'master' of git.eleves.ens.fr:mpepin/sysdig

parents 827d3872 62fd5c5f
......@@ -7,9 +7,9 @@ require utils
blocs en fonction de l'instruction courante
*)
control(instruction:[6]) = (reg_dst, jump, branch, mem_read, mem_to_reg,
alu_op:[3], mem_write, alu_src, reg_write,
write_pc) where
control(instruction:[6], funct:[6]) = (reg_dst, jump, branch, mem_read,
mem_to_reg, alu_op:[3], mem_write,
alu_src, reg_write, write_pc) where
(* Variable interne égale à 1 s'il s'agit d'une instruction de branchement,
beq ou bne *)
......@@ -40,13 +40,20 @@ control(instruction:[6]) = (reg_dst, jump, branch, mem_read, mem_to_reg,
Remarque : la gestion actuelle fait que 000 est attribué aux R-format*)
alu_op =
mux(instruction[0], 1,
mux(instruction[2] & (not instruction[3]), 1, 0)) .
mux((instruction[2] & instruction[3]) & (instruction[4] xor instruction[5]),
1, 0) .
mux((instruction[2] xor instruction[5]) &
not(instruction[0]) &
instruction[3] or instruction[4],
1, 0);
mux(instruction[2] and (not instruction[3]),
1,
0)
) .
mux((instruction[2] and instruction[3]) and
(instruction[4] xor instruction[5]),
1,
0
) .
mux((instruction[2] xor instruction[5]) and
not(instruction[0]) and
instruction[3] or instruction[4],
1,
0);
(* mem_write à 1 => mémoire RAM accédée en écriture
......@@ -59,15 +66,13 @@ control(instruction:[6]) = (reg_dst, jump, branch, mem_read, mem_to_reg,
alu_src = instruction[0] or instruction[1] or instruction[2];
(* reg_write à 1 => une valeur doit être écrite dans un registre
Faux pour les sauts et branchements (et mult/div ?) *)
Faux pour les sauts (j, jr, jal), branchements (beq, bne) et
pour multiplication et division (mult, div) *)
(* TODO : à compléter *)
reg_write = not (instruction[0]) and
not (instruction[1]) and
not (instruction[2]) and
(instruction[3] and not(instruction[4])) or
(not(instruction[3]) and instruction[4]);
(* Cas jr ? Cas mult/div ? *)
reg_write = (not(instruction[0] or instruction[1] or instruction[2])
and ((instruction[3] and not(instruction[4])) (* beq, bne *)
or (not(instruction[3]) and instruction[4])) (* j, jal *)
) or (not(funct[0]) and funct[2]); (* jr, mult, div *)
(* write_pc à 1 => entrée du banc de registre issue de PC
Uniquement utilisé pour l'instruction jal *)
......@@ -108,9 +113,16 @@ ALU_control(funct:[6], op:[3]) = (alu_op:[4], use_shamt) where
or (funct[0] and funct[3] and funct[4]) (* xor, nor *)
or (op[1] and op[2]); (* xori *)
(* Bit 4 à 1 si => TODO *)
alu_op_4 = 0 (* or use_shamt *); (* si modif, bouger use_shamt avant*)
(* Bit 4 à 1 si => sub, div, or, xor, slt, srav, sra, mfhi,
ori (op = 010), xori (op = 011),
slti (op = 101), beq et bne (op = 101) *)
alu_op_4 = (funct[0] and funct[4] and (not funct[5])) (* sub, xor, slt *)
or ((not funct[0]) and funct[4] and funct[5]) (* srav, sra *)
or (funct[1] and (not funct[2] or funct[4])) (* mfhi *)
or equal_n<6>(funct, 0.1.1.0.1.0) (* div *)
or equal_n<6>(funct, 1.0.0.1.0.1) (* or *)
or (op[0] and op[2]) (* op forcée : slti, beq, bne (101) *)
or (not(op[0]) and op[1]); (* op forcée : ori, xori (01x) *)
alu_op = alu_op_1 . alu_op_2 . alu_op_3 . alu_op_4;
......
......@@ -17,7 +17,7 @@ main (b) = (instruction:[word], syscall, ctrl:[2]) where
(* Setting the control flags *)
(reg_dst, jump, branch, mem_read, mem_to_reg, alu_op,
mem_write, alu_src, reg_write, write_pc) = control(instruction[0..5]);
mem_write, alu_src, reg_write, write_pc) = control(instruction[0..5], instruction[26..31]);
(alu_ctrl, use_shamt) = ALU_control(instruction[26..31], alu_op);
(* Accessing the registers *)
......
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