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Martin Pepin
sysdig
Commits
34b6f8e2
Commit
34b6f8e2
authored
Jan 14, 2017
by
Martin Pépin
Browse files
Fix typos
parent
d3e914b5
Changes
2
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cpu/src/alu/main.mj
View file @
34b6f8e2
...
...
@@ -6,44 +6,42 @@ require alu/utils
*)
ALU(input1:[32], input2:[32], alu_control:[4], use_shamt) =
(alu_zero, result:[32]) where
R_format = equal_zero_n<3>(alu_op);
ALU(input1:[32], input2:[32], alu_control:[4]) = (alu_zero, result:[32]) where
result =
mux(alu_control[0], (* if 1 then shift or HI/Lo, else logical or artih*)
mux(alu_control[2], (* if 1 then HI/LO, else logical shift *)
mux(alu_control[3], (* Case HI/LO *)
mux
_n<word>
(alu_control[0], (* if 1 then shift or HI/Lo, else logical or artih*)
mux
_n<word>
(alu_control[2], (* if 1 then HI/LO, else logical shift *)
mux
_n<word>
(alu_control[3], (* Case HI/LO *)
read_HI(), (*TODO*)
read_LO()
), (*TODO*)
mux(alu_control[1], (* Case logical shift *)
mux
_n<word>
(alu_control[1], (* Case logical shift *)
shift_by_reg_ALU(input1, input2, 1, alu_control[3]),
shift_by_reg_ALU(input1, input2, 0, 0)
)
),
mux(alu_control[1], (*if 1 then logical else arihtmetical *)
mux(alu_control[2],
mux(alu_control[3],
mux
_n<word>
(alu_control[1], (*if 1 then logical else arihtmetical *)
mux
_n<word>
(alu_control[2],
mux
_n<word>
(alu_control[3],
xor_ALU(input1, input2),
nor_ALU(input1, input2)
),
mux(alu_control[3],
mux
_n<word>
(alu_control[3],
or_ALU(input1, input2),
and_ALU(input1, input2)
)
),
mux(alu_control[2],
mux(alu_control[3],
mux
_n<word>
(alu_control[2],
mux
_n<word>
(alu_control[3],
(*TODO : multiplication et division*)
zero_n<32>(),
zero_n<32>()
),
add_ALU(input1, input2, alu_control[3])
,
add_ALU(input1, input2, alu_control[3])
)
)
);
...
...
cpu/src/main.mj
View file @
34b6f8e2
...
...
@@ -35,7 +35,7 @@ main (b) = (instruction:[word], syscall, ctrl:[2]) where
use_shamt,
extand_left_n<5,word-5>(instruction[21..25]),
mux_n<word>(alu_src, imm, read_data2)
)
)
;
(alu_zero, alu_result) = ALU<word>(read_data1,
alu_input_2,
alu_ctrl);
...
...
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