Merge branch 'master' of git.eleves.ens.fr:mpepin/sysdig

cpu/src/alu/main.mj

+require registers
+require ALU/utils
 (* The ALU implementation
 
    TODO
 
 *)
 
-ALU<n>(input1:[n], input2:[n], alu_control:[4]) = (alu_zero, result:[n]) where
-  alu_zero = false; (* TODO *)
-  result = input1; (* TODO *)
+ALU(input1:[32], input2:[32], alu_control:[4], alu_op:[3], use_shamt,
+			 shamt:[5], constant:[16]) =	(alu_zero, result:[32]) where
+  R_format = equal_zero_n<3>(alu_op);
+	result =
+		mux(R_format,
+			mux(alu_control[0], (* if 1 then shift or HI/Lo, else logical or artih*)
+				mux(alu_control[2], (* if 1 then HI/LO, else logical shift *)
+					mux(alu_control[3], (* Case HI/LO *)
+						read_HI(), (*TODO*)
+						read_LO()
+						), (*TODO*)
+
+					mux(alu_control[1], (* Case logical shift *) (*TODO : optimiser use_shamt ?*)
+						mux(use_shamt,
+							shift_by_shamt_ALU(input1, shamt, 1, alu_control[3]),
+							shift:_by_reg_ALU(input1, input2, 1, alu_control[3])
+							),
+
+						mux(use_shamt, (* Case logical shift left *)
+							shift_by_shamt_ALU(input1, shamt, 0, 0),
+							shift_by_reg_ALU(input1, input2, 0, 0)
+							)
+						)
+					),
+
+				mux(alu_control[1], (*if 1 then logical else arihtmetical *)
+					mux(alu_control[2],
+						mux(alu_control[3],
+							xor_ALU(input1, input2),
+							nor_ALU(input1, input2)
+							),
+
+						mux(alu_control[3],
+							or_ALU(input1, input2),
+							and_ALU(input1, input2)
+							)
+						),
+
+					mux(alu_control[2],
+						mux(alu_control[3],
+							(*TODO : multiplication et division*)
+							zero_n<32>(),
+							zero_n<32>()
+							),
+
+						add_ALU(input1, input2, alu_control[3]),
+						)
+					)
+				),
+
+		(*TODO : opérations pas format R *)
+		zero_n<32>()
+		);
+	alu_zero = equal_zero_n<32>(result);
 end where