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Martin Pepin
sysdig
Commits
ee11a1d2
Commit
ee11a1d2
authored
Jan 15, 2017
by
Martin Pépin
Browse files
Fix shift function
parent
9b05c1a5
Changes
1
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Side-by-side
cpu/src/alu/utils.mj
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ee11a1d2
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@@ -7,7 +7,6 @@ equal_ALU(a:[32], b:[32]) = (o) where
end where
(* ------------------------------------------------------------------------- *)
(* Extension de nappes *)
...
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@@ -31,40 +30,46 @@ extand_const_n<n, offset>(c:[n]) = (o:[n + offset]) where
o = extand_left_n<n, offset>(c, c[0])
end where
cut_tail<n>(x:[n]) = out:[n-1] where
if n = 1 then
out = [];
else
out = x[..n-2];
end if
end where
(* logical shifts *)
shift_by_const_n<n, m, shift_val>(input:[n], cst:[m], is_right, keep_sign) =
(out:[n]) where
if (n + 1) <= (2 * shift_val) then (* remarque : seul <= est implémenté... *)
aux = mux_n<n>(cst[m-1],
mux_n<n>(is_right,
extand_left_n<n - shift_val, shift_val>
(input[..(n-1) - shift_val], mux(keep_sign, input[0], 0)),
extand_right_n<n - shift_val, shift_val>
(input[shift_val..], 0)),
input);
out = shift_by_const_n<n, m-1, n>(aux, cst[..m-2], is_right, keep_sign);
shift_by_const<n,m,shift_val>(input:[n], cst:[m], is_right, signed)
= out:[n] where
if shift_val <= n then
if m = 0 then
bit = mux(signed & is_right, input[0], 0);
out = mux_n<n>(
is_right,
extand_left_n<n-shift_val,shift_val>(input[shift_val..], bit),
extand_right_n<n-shift_val,shift_val>(input[..n-shift_val-1], bit)
);
else
new_cst = cut_tail<m>(cst);
out = mux_n<n>(
cst[m-1],
shift_by_const<n,m-1,shift_val*2+1>(input, new_cst, is_right, signed),
shift_by_const<n,m-1,shift_val*2>(input, new_cst, is_right, signed)
);
end if
else
aux = mux_n<n>(cst[m-1],
mux_n<n>(is_right,
extand_left_n<n - shift_val, shift_val>
(input[..(n-1) - shift_val], mux(keep_sign, input[0], 0)),
extand_right_n<n - shift_val, shift_val>
(input[shift_val..], 0)),
input);
out = shift_by_const_n<n, m-1, 2*shift_val>
(aux, cst[..m-2], is_right, keep_sign);
out = zero_n<n>();
end if
end where
(* shift by shamt, either to the right or to the left. Arithmetic or not.*)
shift_by_shamt_ALU(input:[32], shamt:[5], is_right, keep_sign) = (out:[32]) where
out = shift_by_const
_n
<32, 5, 1>(input, shamt, is_right, keep_sign)
out = shift_by_const<32, 5, 1>(input, shamt, is_right, keep_sign)
end where
(* shift by value stored in reg, to the right or left, arithmetic or not *)
shift_by_reg_ALU(input:[32], cst:[32], is_right, keep_sign) = (out:[32]) where
out = shift_by_const
_n
<32, 32, 1>(input, cst, is_right, keep_sign)
out = shift_by_const<32, 32, 1>(input, cst, is_right, keep_sign)
end where
(* ------------------------------------------------------------------------- *)
(* Opérations booléennes *)
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