Added a control flag to differentiate beq from bne (two types of branchments)

cpu/src/control.mj

@@ -7,9 +7,9 @@ require utils
             blocs en fonction de l'instruction courante
 *)
 
-control(instruction:[6], funct:[6]) = (reg_dst, jump, branch, mem_read,
-                                       mem_to_reg, alu_op:[3], mem_write,
-                                       alu_src, reg_write, write_pc) where
+control(instruction:[6],
+        funct:[6]) = (reg_dst, jump, branch, mem_read, mem_to_reg, alu_op:[3],
+                      mem_write, alu_src, reg_write, write_pc, is_beq) where
 
   (* Variable interne égale à 1 s'il s'agit d'une instruction de branchement,
      beq ou bne *)
@@ -78,6 +78,9 @@ control(instruction:[6], funct:[6]) = (reg_dst, jump, branch, mem_read,
      Uniquement utilisé pour l'instruction jal *)
   write_pc = equal_n<6>(instruction, 0.0.0.0.1.1);
 
+  (* is_beq à 1 => instruction beq *)
+  is_beq = equal_n<6>(instruction, 0.0.0.1.0.0);
+
 end where
 
 (* Bloc de contrôle de l'ALU

cpu/src/main.mj

@@ -12,12 +12,14 @@ require alu/main
 
 main (b) = (instruction:[word], syscall, ctrl:[2]) where
   (* Reading the next instruction from the ROM *)
-  (instruction, syscall, ctrl) = next_instruction(instruction[6..], imm, jump,
-                                                  branch and alu_zero);
+  (instruction, syscall, ctrl) = next_instruction(instruction[6..],
+                                 imm, jump, branch and (not(is_beq) xor alu_zero));
 
   (* Setting the control flags *)
-  (reg_dst, jump, branch, mem_read, mem_to_reg, alu_op,
-   mem_write, alu_src, reg_write, write_pc) = control(instruction[0..5], instruction[26..31]);
+  (reg_dst, jump, branch, mem_read,
+   mem_to_reg, alu_op, mem_write, alu_src,
+   reg_write, write_pc, is_beq) = control(instruction[0..5], instruction[26..31]);
+
   (alu_ctrl, use_shamt) = ALU_control(instruction[26..31], alu_op);
 
   (* Accessing the registers *)