... | ... | @@ -11,7 +11,7 @@ Modifies the graph to add a node to it. |
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## `node_for_label` : 'a graph -> 'a -> 'a node`
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Give the node corresponding to the label. Raises `Not_found` if no such node exists.
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## `add_edge : 'a graph -> 'a -> 'a -> unit`
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## `add_edge : 'a graph -> 'a -> 'a -> unit`
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Modifies the graph to add an edge to it (both nodes have to exist previously, raises `Not_found` otherwise).
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## `clear_marks : 'a graph -> unit`
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... | ... | @@ -61,7 +61,7 @@ Gives the value of the argument in the current context. If it does not exist, it |
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## `anot : Netlist_ast.arg -> Netlist_ast.ident -> unit`
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Updates the context such that the identifier provided is mapped to the opposite of the argument provided, bitwise in the case of a bus.
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## `abinop : Netlist_ast.binop -> Netlist_ast.arg -> Netlist_ast.arg -> Netlist_ast.ident -> unit`
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## `abinop : Netlist_ast.binop -> Netlist_ast.arg -> Netlist_ast.arg -> Netlist_ast.ident -> unit`
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Updates the context such that the identifier provided is mapped to the corresponding boolean binary operator provided applied to the two arguments, bitwise in case of a bus.
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Raises `Failure "Binop on two buses of different sizes"` if the function is called on two buses of different sizes or `Failure "Type Mismatch"` if it is called on a wire and a bus.
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... | ... | @@ -90,7 +90,7 @@ Raises `Failure "Register [id] is not connected"` if the value the register labe |
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## `init : Netlist_ast.program -> unit`
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Initiallizes the memory to be full of zeroes at the good size.
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## `input_wire : Netlist_ast.ident -> unit`
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## `input_wire : Netlist_ast.ident -> unit`
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Updates the context such that the provided identifier is mapped to the bit given by the user in `stdin`, in the form of an integer.
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Note : any non nil integer is mapped to `true`, 0 is mapped to `false`.
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... | ... | @@ -98,28 +98,28 @@ Note : any non nil integer is mapped to `true`, 0 is mapped to `false`. |
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Updates the context such that the provided identifier is mapped to the bits given by the user, bit by bit, in `stdin` (it asks the value of every wire).
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## `input : Netlist_ast.program -> unit`
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Calls [input_wire](## \`input_wire : Netlist_ast.ident -> unit\`) or [input_bus](\`input_bus : Netlist_ast.ident -> unit\`) on every identifier marked as an input in the program.
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Calls [input_wire](#input_wire-netlist_astident-unit) or [input_bus](#input_bus-netlist_astident-unit) on every identifier marked as an input in the program.
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## `output : Netlist_ast.program -> unit`
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Prints on `stdout` all the identifiers and corresponding values marked as an output in the program.
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Note : the values are in the form of integers.
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## `sim_step : Netlist_ast.program -> unit`
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Calls [`sim_eq`](## `sim_eq : Netlist_ast.equation -> unit`) for each equation in the program. Will run smoothly if the equations are ordered according to their dependencies.
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Calls [sim_eq](#sim_eq-netlist_astequation-unit) for each equation in the program. Will run smoothly if the equations are ordered according to their dependencies.
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## `cycle : Netlist_ast.program -> unit`
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Executes a full cycle of the simulation :
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- Reinitiallize the context.
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- Takes the input from the user ([input](## \`input : Netlist_ast.program -> unit\`)).
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- Simulates a step. ([sim_step](## \`sim_step : Netlist_ast.program -> unit\`))
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- Writes in memory. ([write_mem](## \`write_mem : Netlist_ast.program -> unit\`))
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- Outputs the results. ([output](## \`output : Netlist_ast.program -> unit\`))
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- Takes the input from the user ([input](#input-netlist_astprogram-unit)).
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- Simulates a step. ([sim_step](#sim_step-netlist_astprogram-unit))
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- Writes in memory. ([write_mem](#write_mem-netlist_astprogram-unit))
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- Outputs the results. ([output](#output-netlist_astprogram-unit))
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## `simulator : Netlist_ast.program -> int -> unit`
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Runs as many cycles ( [cycle](## \`cycle : Netlist_ast.program -> unit\`) ) as instructed, with an infinite loop if the step number is -1.
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Runs as many cycles ( [cycle](#cycle-netlist_astprogram-unit) ) as instructed, with an infinite loop if the step number is -1.
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## `compile : string -> unit`
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Reads the netlist file via some voodoo magic happening in the [netlist.ml](netlist.ml) file, then sorts it according to the dependencies of the variables ([Scheduler.schedule](## \`schedule : Netlist_ast.program -> Netlist_ast.program\`)), then simulates it ([simulator](## \`simulator : Netlist_ast.program -> int -> unit\`).
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Reads the netlist file via some voodoo magic happening in the [netlist.ml](https://git.eleves.ens.fr/pfournier01/netlist_simulator/-/blob/master/netlist.ml) file, then sorts it according to the dependencies of the variables ([Scheduler.schedule](#schedule-netlist_astprogram-netlist_astprogram)), then simulates it ([simulator](#simulator-netlist_astprogram-int-unit).
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Fails with error message `The netlist has a combinatory cycle` if the dependencies cannot be resolves, and with a parse error if there is a problem in the format of the netlist.
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## `main : unit -> unit`
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... | ... | |