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  • Paul Fournier
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Implementation · Changes

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Update Implementation authored Nov 07, 2020 by Paul Fournier's avatar Paul Fournier
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Implementation.md
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%TODO # Main scheme
This is the implementation details of the netlist simulator. As mentionned in the [readme](README.md), the simulator and its environment run in a simple fashion.
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1. Read and parse the netlist (as provided in the documentation, `netlist.ml`, `netlist_ast.ml`, `lexer.ml`, `parser.ml`)
2. Order the netlist according to the dependencies via a topological sort (`graph.ml`, `scheduler.ml`, see [the scheduler doc](/Functions/Scheduler))
3. Simulate the netlist in a sequential fashion (`simulator.ml`, see [the simulator doc](Functions/Simulator))
1. Initialize the memory (currently the ROM cannot be inputted from the user)
The memory is represented by its id. Memory is implemented via hash-tables, see [the corresponding part](#Memory).
2. Take the input, see [Input](#Input).
3. Make the combinatorial computations for a cycle, see [Computations](#Computations).
4. Write into the registers (rising edge of the clock), see [Memory](#Memory).
5. Give the output, see [Output](#Output).
6. Go back to 2. if there are other steps to simulate.
# Memory
There are two kinds of things to memorize during the simulation :
1. The current state of the wires during the combinatorial computation
2. The current state of the memory blocks
These two are represented differently. 1. is represented via an environment type, with each identificator (of type `ident = string`) mapped to a value of type `Netlist_ast.value`, which represents either a single wire (`VBit of bool`) or a bus (`VBitArray of bool array`). This represents the current global context.
The memory blocks, 2., is represented in hashtables. There are three hashtables : `reg`, `ram` and `rom`. `reg` maps an `ident` to a `bool`, in a straightforward manner, as one would expect. On the other hand, `rom` and `ram` map an `ident` to another hashtable. For instance, let us call `r` an element of `ram`. `r` is a hashtable which is a fancy way to represent a perhaps mostly-empty array. If the RAM it represents has an address size of $`n`$ bits, it could store up to $`2^n`$
# Input
# Computations
# Output
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